Papers & Documents
Books
- G. Donzellini, L. Oneto, D. Ponta, D. Anguita
“Introduction to Digital Systems Design” (2019, English Version),
Springer Nature Switzerland AG, DOI: 10.1007/978-3-319-92804-3, ISBN: 978-3-319-92804-3
- G. Donzellini, A.M.Garavagno, L. Oneto
“Introduction to Microprocessor-based System Design” (2022, English Version),
Springer Nature Switzerland AG, DOI: 10.1007/978-3-030-87344-8, ISBN: 978-3-030-87344-8
- G. Donzellini, L. Oneto, D. Ponta, D. Anguita
“Introduzione al Progetto di Sistemi Digitali” (2018, Versione in Italiano),
Springer-Verlag Italia S.r.l, DOI: 10.1007/978-88-470-3963-6, ISBN: 978-88-470-3963-6
- G. Donzellini, A.M.Garavagno, L. Oneto
“Introduzione al progetto di sistemi a microprocessore” (2020, Versione in Italiano),
Springer-Verlag Italia S.r.l, DOI: 10.1007/978-88-470-4004-5, ISBN: 978-88-470-4003-8
Papers
- G. Donzellini, D. Ponta,
“Digital Design Laboratory - A Musical Box on FPGA designed with Deeds”,
Proceedings of the “15th Biennal Baltic Electronics Conference (BEC) - BEC 2016”,
Tallinn, Estonia (EU), 3-5 October 2016, pp.67-70, IEEE Catalog Number: CFP16BEC-USB, ISBN: 978-1-5090-1392-0
- G. Donzellini, D. Ponta,
“Introducing Field Programmable Gate Arrays with Deeds Projects”,
Proceedings of the “Fourth Interdisciplinary Engineering Design Education Conference - I-EDEC 2014”,
Santa Clara, California (USA), 3 March 2014, pp.58-65, IEEE Catalog Number: CFP1428S-CDR, ISBN: 978-1-4673-5112-6 (CD-ROM)
- G. Donzellini, D. Ponta,
”From Gates to FPGA: Learning Digital Design with Deeds”,
Proceedings of the “Third Interdisciplinary Engineering Design Education Conference - IEDEC 2013”,
Santa Clara, California (USA), 4-5 March 2013, pp.41-48, ISBN: 978-1-4673-5112-6 (CD-ROM)
- G. Donzellini, D. Ponta,
”A Novel Tool to Introduce FPGA in Digital Design Laboratory”,
Proceedings of the “9th International Conference on Remote Engineering and Virtual Instrumentation – REV 2012”,
Bilbao, Spain, 4-6 July 2012, pp.215-223, ISBN 978-1-4673-2542-4
- G. Donzellini, D. Ponta,
“Teaching Digital Design in the FPGA age”,
Proceedings of the “International Conference on Engineering Education 2012 - ICEE 2012”,
Turku, Finland, 30 July – 3 August 2012, pp.967-974, ISBN 978-952-216-315-8
- G. Donzellini, D. Ponta,
“A Bottom-up Approach to Digital Design with FPGA”,
Proceedings of the “8th 2011 International Conference on Microelectronic Systems Education – IEEE MSE11”,
San Diego, California (U.S.A.), 5-6 June 2011, pp. 31-34, ISBN 978-1-4577-0550-2
- G. Donzellini, D. Ponta,
“E-Learning Tool for Digital Design and Embedded System Training”,
in E-Learning, M. Buzzi editor,
Ed. In-Teh, Vukovar, Croatia, 2010, pp. 223–244, ISBN 978-953-7619-95-4
- G. Donzellini, D. Ponta,
“From Gates to Embedded Systems: a Bottom-up Approach to Digital Design”,
Proceedings of the “VIII 2009 International Conference on Microelectronic Systems Education – IEEE MSE09”,
San Francisco, California (U.S.A.), 25-27 July 2009, pp.61-64, ISBN 978-1-4244-4406-9
- G. Donzellini, D. Ponta,
“A Virtual Laboratory for Digital Design”,
International Journal of Online Engineering (iJOE),
Vol 4, No 2 (2008)
- G. Donzellini, D. Ponta, and J. Garcia-Zubia,
“PBL in Digital Electronics: an Example”,
Proceedings of the “VIII Congreso de Tecnologías Aplicadas a la Enseñanza de la Electrónica - TAEE 2008”,
Zaragoza (Spain), 2-4 July 2008
- G. Donzellini, D. Ponta,
“A Simulation Environment for e-Learning in Digital Design”,
IEEE Transactions on Industrial Electronics,
vol. 54, no. 6, Dec. 2007, pp. 3078-3085, ISSN 0278-0046
- G. Donzellini, D. Ponta,
“The electronic laboratory: traditional, simulated or remote?”,
in Advances on remote laboratories and e-learning experiences,
L. Gomes and J. Garcia-Zubia editors, Ed. Bilbao: University of Deusto, 2007, pp. 223–246, ISBN 978-84-9830-077-2
Documents
- Approaching Field Programmable Gate Arrays with Deeds (slides, TAEE 2020, invited keynote) - (PDF, about 6.9 MB)
- Digital Design Laboratory - A Musical Box on FPGA designed with Deeds (slides, BEC 2016) - (PDF, about 1.6 MB)
- Introducing Field Programmable Gate Arrays with Deeds Projects (slides, IEDEC 2014) - (PDF, about 3.5 MB)
- From Gates to FPGA: Learning Digital Design with Deeds (slides, IEDEC 2013) - (PDF, about 8.7 MB)
- A Bottom-up Approach to Digital Design with FPGA (poster, MSE 2011) - (PDF, about 1.7 MB)
- From Gates to Embedded Systems: a Bottom-Up Approach to Digital Design (MSE 2009) - (PDF, about 1 MB)
- Deeds: a Tool for Digital Design and Embedded System Training (slides, Instanbul 2008) - (PDF, about 13.5 MB)
- Using the Deeds Learning Materials (draft, old version, Feb 2004) - (PDF, about 2.7 MB)
- Deeds - User Manual (draft, old version, Feb 2004) - (PDF, about 6 MB)
- First Presentation (NetPro Meeting May 2001) - (PDF, about 2.5 MB)