Delays and Hazards

Giuliano Donzellini, Domenico Ponta

Analysis and elimination of static hazards

025130

 

v1.71

Load the following combinational network in the d-DcS, with a click on the figure:

The network is the well-known two-input multiplexer. Measure, using the timing simulation , the (simulated) propagation time between the signal Sel and the output Out, and compile a table as this (the first column shows the transitions of the input Sel):

Progagation Time Delay
Sel
In1
In2
Sel -> Out
H - L
0
1
?
nS
L - H
0
1
?
nS
H - L
1
0
?
nS
L - H
1
0
?
nS

A suitable test sequence is available in the Timing Diagram window. To make easier the time measurement, in this window two useful commands are available:

  • The H cursor (Home, highlighted in blue ), when positioned in the diagram, allows to Zoom In or Zoom Out the view around to the cursor itself;
  • The I and II cursor pair (Time Meter Cursors, highlighted in red) to enable time measurement between them.

Now verify that, when In1 and In2 are at level 'High', one of the transitions of the Sel input produces a hazard on the output signal Out. Measure the time duration of the hazard, analysing its behaviour with a timing simulation displayed in a proper time scale.

Using the method of covering one-to-one transitions, modify the circuit, eliminating the hazard. Draw the schematic of the modified circuit and verify the actual elimination of the hazard with a timing simulation (using the same test sequence and the same time scale, as before). Click on the next figure to open in the d-DcS the schematic to be completed: