Verify the behavior of the 2->1 multiplexer represented in the figure below, using the Deeds Digital Circuit Simulator (d-DcS). Click on the figure to open in the d-DcS a trace of the network's schematic, and then complete it to obtain the schematic below:

Once completed the schematic, you'll be ready to start the functional simulation of the network (click on the command on the d-DcS toolbar). In this way, the input switches can be toggled and the output value will change accordingly: compile a truth table with the results of the functional simulation.

Last task requested is the timing simulation of the network (click on the command on the d-DcS tooolbar). The test sequence shown below is available in the Timing Diagram window: in this sequence, the input In1 changes its values more frequently than In2. The signal currently selected by Sel can therefore be easily identified on the output Out.